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SkillAtlasSkill 详情
hsb-ip-create-top
Official, NVIDIA-verified Agent Skills for Claude Code, Codex, and other coding agents.
审核状态：已审核Quality 80Security 100
项目 README
来源文件：README.md
NVIDIA Agent Skills
Official, NVIDIA-verified Agent Skills for Claude Code, Codex, and other coding agents.
📖 Docs: docs.nvidia.com/skills · 📺 Livestream: From Vulnerable to Verified · 📝 Blog: NVIDIA Verified Agent Skills: Capability Governance for AI Agents
Skills are portable instruction sets that teach AI agents how to use NVIDIA software optimally: Physical AI and robotics workflows, simulation, CUDA-X libraries, RAG and AI Blueprints, and platform tools. This repository is a catalog: skills are maintained in their respective product repos, and mirrored here daily via an automated sync pipeline. Skills are being added continuously, so check back for updates. We are building this infrastructure in the open, and contributions are welcome. See the Roadmap for what is planned next.
Quickstart
Install NVIDIA skills with the default skills CLI flow:
npx skills add nvidia/skills
The CLI runs through npx and prompts you to choose a skill and install destination. You do not need to clone this repo or copy skill folders by hand.
Requires a current
skillsCLI (v1.5.16 or newer). Installing vianpx skills@latest add nvidia/skillsalways uses the latest. On older CLIs (v1.5.15 and earlier), skills may install but not appear in Claude Code — see Troubleshooting.
The skill is available the next time your agent loads skills and encounters a relevant task. For example, ask your agent to "solve a linear programming problem with cuOpt" and the skill guides it through the cuOpt Python API. In Claude Code, run /reload-skills to load newly installed skills in your current session.
Install One Skill Without Prompts
Use this when you already know the skill name and want to skip prompts.
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --yes
Replace cuopt-numerical-optimization-api with any skill name from the Skill Catalog.
Install for a Specific Agent
Use --agent to target a specific AI coding agent. Initially, we'll support common client targets, expanding the list over time. For the full list of clients supported by the spec, see the skills CLI Supported Agents table.
Claude Code
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --agent claude-code
Codex
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --agent codex
Snowflake CoCo
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --agent cortex
Cursor
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --agent cursor
Kiro
npx skills add nvidia/skills --skill cuopt-numerical-optimization-api --agent kiro-cli
Use --agent more than once to install the same skill into multiple agents.
npx skills add nvidia/skills \
--skill cuopt-numerical-optimization-api \
--agent claude-code \
--agent codex \
--agent cursor \
--agent kiro-cli
Keep Skills Up to Date
New skills land continuously, and existing ones are revised, renamed, or consolidated as the catalog evolves. Refresh what you have installed with:
npx skills update
Run it interactively and the CLI also flags skills that were removed or merged upstream (for example, when several skills are consolidated into one) and offers to remove the stale local copies. Use npx skills list to see what is installed and npx skills check to preview what is out of date first.
Browse the Catalog
Use this when you want to see available NVIDIA skills before installing anything.
npx skills add nvidia/skills --list
For non-interactive installs, global installs, agent-specific installs, updates, removals, and fallback manual copying, see Advanced installation.
Skill Catalog
Getting Help & Contributing
Where to file an issue depends on what's broken:
- Skill content issues (a specific skill has a bug, missing functionality, or incorrect content) — file in the source repo for that product, using the per-product table below.
- Catalog issues (catalog README errors, sync workflow problems, distribution channels, signing/verification flow, docs in this repo) — file here using the catalog issue templates: Bug Report, Feature Request, or Documentation Request or Correction.
- Questions or general discussion — use Discussions. The issue tracker is reserved for bug reports, feature proposals with a design, and documentation issues.
- Security vulnerabilities — follow the disclosure process in SECURITY.md; do not open a public issue.
Per-product source repo links:
For issues with this catalog repo itself (README, structure, listing a new product): open an issue here.
Verifying Skills
Every published skill ships with a detached OMS signature (skill.oms.sig). The sync pipeline drops any skill missing the required artifacts before publishing, so every skill in the catalog carries:
SKILL.md— the skill instructions consumed by the agentskill-card.md— skill identity and governance cardskill.oms.sig— detached OMS signature (verifiable againstnv-agent-root-cert.pem)- A Tier-3 evaluation dataset — accepted at
evals/evals.json,evals/*.json,eval/*.json, orbenchmark/evals.json BENCHMARK.md— generated benchmark report capturing verifiable uplift data
Verify a skill against the NVIDIA trust anchor nv-agent-root-cert.pem:
pip install model-signing
model_signing verify certificate SKILL_DIR \
--signature SKILL_DIR/skill.oms.sig \
--certificate_chain nv-agent-root-cert.pem \
--ignore_unsigned_files
A successful verification confirms that the skill contents have not been modified since signing by NVIDIA.
See Verify Signed Agent Skills for signature layout, the trust pipeline, and policy options.
Roadmap
- ✅ Public skills catalog with NVIDIA-verified skills across multiple products
- ✅ Automated sync pipeline with skills mirrored from product repos daily
- ✅ Security scanning for all published skills covering instruction safety and supply-chain integrity
- ✅ Skills signing so every published skill carries a verifiable NVIDIA signature
- ✅ Skills universal evaluation criteria and task-specific criteria
- ✅ Skill Card with machine-readable metadata for identity, provenance, quality, and behavioral boundaries
- ✅ Sync-time compliance gates — signature drift detection and missing-artifact enforcement
- ✅ Syndication to external marketplaces — Skills.sh, Codex plugin, Claude Code plugin, ClawHub, Hermes Hub
- 🔲 Syndication to additional MCP hubs and partner channels
Repository Structure
NVIDIA/skills/
├── skills/ # NVIDIA-verified skills (count grows continuously),
│ │ synced from upstream product repos
│ ├── README.md # Browser-facing install guidance
│ ├── <product-prefix>-*/ # Flat layout — one dir per skill, product-prefixed
│ │ # e.g. aiq-*, cuopt-*, cupynumeric-*,
│ │ # dali-*, deepstream-*, dicom-*, digital-health-*,
│ │ # dynamo-*, earth2studio-*, holoscan-*, hsb-*,
│ │ # jetson-*, launch-nemo-rl, mcore-*,
│ │ # nemo-automodel-*, nemo-data-designer-plugin,
│ │ # nemo-evaluator-plugin, nemo-mbridge-* (20 skills),
│ │ # nemo-retriever, nemo-rl-* (4 skills),
│ │ # nemoclaw-user-guide, nemotron-*, nemotron-speech,
│ │ # nv-* (medical AI), physicsnemo-*, rag-*,
│ │ # skill-card-generator, tao-*, tilegym-*,
│ │ # vss-* (15 skills), accelerated-computing-cudf,
│ │ # cudaq-guide, portfolio-optimization
│ ├── omniverse-*/ # Physical AI — manually staged (see manual-components.yml)
│ └── physical-ai-*/ # Physical AI — manually staged
├── components.d/ # Product registry — one file per component, teams onboard here
│ ├── README.md # Schema and onboarding instructions
│ └── <product>.yml # one file per registered product
├── plugins/ # Packaged plugin distributions
│ └── nvidia-skills/ # Curated NVIDIA skills bundle (Claude Code, Codex)
├── plugins.d/ # Plugin build registry — config for `build-plugins.py`
│ ├── README.md
│ ├── _defaults.yml
│ └── nvidia-skills.yml
├── .claude-plugin/ # Claude Code marketplace metadata
│ └── marketplace.json
├── .agents/plugins/ # Agent marketplace metadata (other clients)
│ └── marketplace.json
├── docs/ # Long-form documentation (published via Fern)
│ ├── README.md # How to build the docs locally
│ ├── index.mdx
│ ├── advanced-install.mdx
│ ├── agent-skill-trust-pipeline.mdx
│ ├── release-checklist.mdx
│ ├── scanning-agent-skills.mdx
│ ├── signing-agent-skills.mdx
│ └── skill-cards.mdx
├── fern/ # Fern docs site configuration
├── .github/
│ ├── workflows/ # Sync pipeline, plugin validation, DCO check, author verify
│ └── scripts/ # regenerate-readme.sh, build-plugins.py,
│ # manual-components.yml (temp Physical AI catalog
│ # exception, removed after Computex 2026),
│ # marketplace/metadata.json (skill metadata sidecar)
├── nv-agent-root-cert.pem # Trust anchor for OMS signature verification
├── skills.sh.json # Skills.sh marketplace grouping config
├── CHANGELOG.md
├── CONTRIBUTING.md # Contribution guidelines
├── SECURITY.md # Security reporting policy
├── CODE_OF_CONDUCT.md # Community code of conduct
├── LICENSE-APACHE # Apache 2.0 (source code)
└── LICENSE-CC-BY-4.0 # CC BY 4.0 (documentation/skills)
Skills are maintained in their respective product repos (see the Source column in the Skill Catalog) and synced to this repo daily. Products only appear under skills/ after the sync pipeline confirms each skill carries:
skill.oms.sig— detached OMS-format signature (verifiable againstnv-agent-root-cert.pem)skill-card.md— skill identity and governance card- A Tier-3 evaluation dataset — accepted at
evals/evals.json,evals/*.json,eval/*.json, orbenchmark/evals.json
When evaluation runs produce a BENCHMARK.md, it ships alongside the skill so consumers can see verifiable benchmark uplift data.
Standards & Compatibility
This repository adheres to the Agent Skills specification:
- Skills are portable directories with a
SKILL.mdfile at their root. - Metadata uses YAML frontmatter with required
nameanddescriptionfields. - Skills follow a progressive disclosure model — lightweight metadata loads at startup, full instructions load on activation.
- Validate your skill using the
skills-refreference library.
License
Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
This code is dual-licensed with documentation/skills under the CC-BY-4.0 AND source code under Apache-2.0 license terms. The full license texts can be found in LICENSE-APACHE and LICENSE-CC-BY-4.0 respectively.
其他
低风险
- 来源需自行核对维护者身份。
- 未检测到明显脚本安装指令。
- 未检测到明显外部权限要求。
- 未检测到高风险命令。
- 扫描发现：0 条。
Codex — Git Clone 安装
- 安装前请先查看来源仓库和风险报告。
- 克隆仓库：git clone https://github.com/NVIDIA/skills.git
- 将 "skills/hsb-ip-create-top" 文件夹复制到 Codex 的 skills 目录中。
- 重启 Codex 让新的 skill 生效。
Codex — 手动复制安装
- 安装前请先查看来源仓库和风险报告。
- 从源仓库下载 SKILL.md 及相关文件。
- 在 Codex 的 skills 目录中创建新文件夹。
- 将所有 skill 文件复制到新文件夹中。
- 重启 Codex 让新的 skill 生效。
Claude Code — Git Clone 安装
- 安装前请先查看来源仓库和风险报告。
- 克隆仓库：git clone https://github.com/NVIDIA/skills.git
- 将 "skills/hsb-ip-create-top" 文件夹复制到 Claude Code 的 skills 目录中。
- 重启 Claude Code 让新的 skill 生效。
Claude Code — 手动复制安装
- 安装前请先查看来源仓库和风险报告。
- 从源仓库下载 SKILL.md 及相关文件。
- 在 Claude Code 的 skills 目录中创建新文件夹。
- 将所有 skill 文件复制到新文件夹中。
- 重启 Claude Code 让新的 skill 生效。
Cursor — Git Clone 安装
- 安装前请先查看来源仓库和风险报告。
- 克隆仓库：git clone https://github.com/NVIDIA/skills.git
- 将 "skills/hsb-ip-create-top" 文件夹复制到 Cursor 的 skills 目录中。
- 重启 Cursor 让新的 skill 生效。
Cursor — 手动复制安装
- 安装前请先查看来源仓库和风险报告。
- 从源仓库下载 SKILL.md 及相关文件。
- 在 Cursor 的 skills 目录中创建新文件夹。
- 将所有 skill 文件复制到新文件夹中。
- 重启 Cursor 让新的 skill 生效。
GitHub Copilot — Git Clone 安装
- 安装前请先查看来源仓库和风险报告。
- 克隆仓库：git clone https://github.com/NVIDIA/skills.git
- 将 "skills/hsb-ip-create-top" 文件夹复制到 GitHub Copilot 的 skills 目录中。
- 重启 GitHub Copilot 让新的 skill 生效。
GitHub Copilot — 手动复制安装
- 安装前请先查看来源仓库和风险报告。
- 从源仓库下载 SKILL.md 及相关文件。
- 在 GitHub Copilot 的 skills 目录中创建新文件夹。
- 将所有 skill 文件复制到新文件夹中。
- 重启 GitHub Copilot 让新的 skill 生效。
Windsurf — Git Clone 安装
- 安装前请先查看来源仓库和风险报告。
- 克隆仓库：git clone https://github.com/NVIDIA/skills.git
- 将 "skills/hsb-ip-create-top" 文件夹复制到 Windsurf 的 skills 目录中。
- 重启 Windsurf 让新的 skill 生效。
Windsurf — 手动复制安装
- 安装前请先查看来源仓库和风险报告。
- 从源仓库下载 SKILL.md 及相关文件。
- 在 Windsurf 的 skills 目录中创建新文件夹。
- 将所有 skill 文件复制到新文件夹中。
- 重启 Windsurf 让新的 skill 生效。
查看 SKILL.md 原文
name: hsb-ip-create-top
author: "Holoscan Team <holoscan-team@nvidia.com>"
description: Create or explain fixed-format HSB FPGA_top.sv wrappers from validated HOLOLINK_def.svh files. Do not use for def generation or validation.
version: "0.1.0"
tags:
- holoscan
- hsb
- fpga
- systemverilog
- top-level
license: Apache-2.0
compatibility: Targets HSB IP rev 16'h2604; backward-compatible with 16'h2603. Prefer live HSB IP source when available; warn on unknown revisions. Designed to work standalone or as a companion to hsb-ip-def.
metadata:
author: "Holoscan Team <holoscan-team@nvidia.com>"
team: holoscan
domain: fpga
vendor: nvidia
tags:
- holoscan
- hsb
- fpga
- top-level
- systemverilog
languages:
- systemverilog
artifact: FPGA_top.sv
source_artifact: HOLOLINK_def.svh
hsb_ip_version: "16'h2604"HSB IP Create Top Skill
Purpose
Create a fixed-format SystemVerilog top-level scaffold that instantiates HOLOLINK_top and declares the HSB-facing signals required by a validated HOLOLINK_def.svh.
This skill owns only the top-level scaffold around the HSB IP:
- SPDX/Apache license header
HOLOLINK_def.svhincludeFPGA_topmodule shell- HSB-facing signal declarations
HOLOLINK_topinstantiation- comments/TODOs for top-level integration
Use hsb-ip-def for HOLOLINK_def.svh generation and validation. Do not create or validate the defs file here.
Prerequisites
- A validated
HOLOLINK_def.svhpath or pasted file content is required before generatingFPGA_top.sv. - Live
HOLOLINK_top.svsource is preferred when source-sensitive port extraction is needed; bundled references cover known rev16'h2604and compatible rev16'h2603. - The user must provide or accept the output path when writing a scaffold file.
Instructions
- Require a validated
HOLOLINK_def.svhbefore creatingFPGA_top.sv. If the user does not have one, invoke or direct them tohsb-ip-deffirst. - Treat live
HOLOLINK_top.svas the source of truth for ports, directions, macro gates, and IP revision whenever it is available. - First classify the request as Standalone Create Top, Def-Skill Handoff, or Explain. Load only the references required for that workflow and do not re-read the same reference just to reconfirm formatting.
- Use
references/fixed-format.mdas the baked formatting and naming style. Do not inspect example top-level files just to confirm formatting during normal generation. - Emit a fixed-format scaffold, not a complete project top. Because the surrounding design is unknown, the generated
FPGA_topmodule normally has no top-level ports. - Derive active signal groups from the validated defs file. Do not connect ports that are absent from
HOLOLINK_topunder the active macro set. - Preserve
HOLOLINK_topport shapes exactly: keep packed vector widths before the signal name and unpacked interface-array dimensions after the signal name. - When using bundled known-rev references, still preserve the signal shapes in
references/fixed-format.md, including unpacked arrays for multi-interface*_tdata,*_tkeep, and*_tuserbuses and the APB shape documented there. - Use sensor-agnostic language. Say "sensor data", "sensor interface", and "stream"; use camera-specific language only after the user says the design is camera-specific.
- Ask one plain-language question per turn when information is missing. Keep source-selection questions as plain-language prompts rather than radio buttons, structured choices, or multi-question prompts.
- Do not invent project-specific integration details. Leave concise TODO comments where the surrounding design must connect to HSB.
- For packetizer comments in
FPGA_top.sv, use generic wording such as "data manipulation behavior". - In final summaries, include the defs validation/source status, the port-map source used, and the emitted HSB signal groups. Do not enumerate what is outside the scaffold's scope. Use only this generic note: "This file is a reference/template for hooking up top-level signals and companion IP to the HSB IP."
Live HSB IP Source Policy
Prefer live HSB IP source over bundled references whenever the user's workspace provides it. The bundled references describe known rev 16'h2604 and backward-compatible rev 16'h2603; live source is the authority for the checked-out IP.
When source is available:
- Locate
<hsb-ip-root>/top/HOLOLINK_top.sv. Known roots includehw/nvcpu_dgx_fpga/vrtl/hololink/and public-releasefpga/nv_hsb_ip/. - Read
HOLOLINK_REVandHOLOLINK_BACKWARD_COMPAT_REVfromHOLOLINK_top.sv. - Read the
HOLOLINK_topmodule declaration to confirm port names, directions, widths, ordering, andifdef/ifndefgates. - If the rev is newer, unknown, or the live source disagrees with this skill's references, state the mismatch. Trust the live source for IO extraction and warn that bundled references may need an update.
When no source is available, use the bundled references as known-revision guidance and say the scaffold is based on the skill's supported HSB IP rev. If the user already authorized using the bundled known-rev port reference when no checkout is obvious, do a brief search of obvious roots and then proceed with bundled references instead of asking the live-source question.
If the source root is not obvious, ask conversationally in one turn:
Do you have a current HSB IP `HOLOLINK_top.sv` source checkout you want me to use for port extraction, or should I use the skill's bundled known-rev port reference?
Accept either a path or a "use bundled reference" answer.
Reference Loading
Load only the reference needed for the user's task:
| File | When to load |
|---|---|
references/source-policy.md | Finding live HSB IP source, handling unknown revisions, or deciding source/reference precedence |
references/fixed-format.md | Generating or explaining the fixed FPGA_top.sv scaffold format |
references/handoff-contract.md | Standalone prerequisite handling or def-skill handoff behavior |
Workflow Decision
- If invoked by
hsb-ip-defafter a successful defs generation/validation, use Def-Skill Handoff. - If the user directly asks to create
FPGA_top.sv, instantiateHOLOLINK_top, or make a top-level wrapper, use Standalone Create Top. - If the user asks about version handling, port groups, or why a signal appears, use Explain.
Standalone Create Top
Use this when the user invokes this skill directly.
Steps:
- Ask for the path to a validated
HOLOLINK_def.svh, or accept pasted content. If the user does not have a defs file, stop and direct them tohsb-ip-defto create and validate it first. - If validation status is unknown, invoke or direct the user to
hsb-ip-defvalidation. Do not proceed from an unvalidated defs file. - If the HSB IP source root is not obvious and source-sensitive output is needed, ask the live-source question from "Live HSB IP Source Policy" unless the user already authorized bundled known-rev fallback. Do not show path options as radio buttons. The known roots are search hints for the agent, not choices to force on the user.
- Load
references/source-policy.mdandreferences/fixed-format.md. - Derive the active macro set from the validated defs file.
- Derive or verify
HOLOLINK_topport groups from live source when available. - Produce
FPGA_top.svin the fixed format. If writing a file, default filename isFPGA_top.svunless the user provides a path. - Explain that the result is an HSB integration scaffold. Use the generic reference/template note in
## Instructions; do not enumerate what is outside the scaffold's scope.
Def-Skill Handoff
Use this when hsb-ip-def has just completed a validated HOLOLINK_def.svh and the user chooses to create a matching top-level scaffold.
Steps:
- Accept the validated defs file path/content and any known profile/source-root context from
hsb-ip-def. - Do not re-ask for defs-file decisions already completed by the def skill.
- Ask only for missing top-generation facts, such as output path or HSB IP source root when needed. If source root is missing, ask the live-source question from "Live HSB IP Source Policy" unless the user already authorized bundled known-rev fallback; do not use radio buttons or structured choices.
- Load
references/handoff-contract.mdandreferences/fixed-format.md. - Generate the fixed-format
FPGA_top.svscaffold from the active defs macros and liveHOLOLINK_top.svwhen available. - Return a concise summary of which HSB signal groups were emitted, then use the generic reference/template note in
## Instructions. Do not enumerate what is outside the scaffold's scope.
Explain
Use this when the user asks why a port or signal group appears, how macro settings affect the top scaffold, or how the skill handles IP revisions.
Steps:
- For port questions, prefer live
HOLOLINK_top.svwhen available. Otherwise loadreferences/fixed-format.md. - For revision/source questions, load
references/source-policy.md. - For defs-file macro meaning, defer to
hsb-ip-def.
Troubleshooting
- Missing or unvalidated defs file: stop before generation and send the user to
hsb-ip-defvalidation. - Unknown or newer HSB IP revision: prefer live source if available, state the mismatch, and warn that bundled references may need updates.
- Port missing under the active macro set: omit that connection and explain which validated def macro disabled the signal group.
Examples
Use hsb-ip-create-top to create an FPGA_top.sv scaffold from my validated HOLOLINK_def.svh. Use the bundled known-rev port reference if no HSB IP source checkout is obvious.Treat as Standalone Create Top, require the validated defs file, loadreferences/source-policy.mdandreferences/fixed-format.md, use bundled known-rev ports after a brief source search, and report the defs status, port-map source, and emitted signal groups.Create a top-level FPGA_top.sv wrapper for HSB, but I do not have a HOLOLINK_def.svh yet.Stop before generation, direct the user tohsb-ip-def, and ask for a validated defs file path or content before proceeding.Why does the generated FPGA_top.sv include different HSB signal groups depending on my HOLOLINK_def.svh macros?Treat as Explain, say that validated defs macros gate the HSB-facing signal groups and that the liveHOLOLINK_top.svport map wins when available; defer detailed macro semantics tohsb-ip-def.
Limitations
- Do not generate
HOLOLINK_def.svh. - Do not validate full
HOLOLINK_def.svhfiles. - Do not generate project-specific integration outside the HSB-facing scaffold.
- Do not infer signal meanings, polarity, sources, or behavior outside the HSB port map.
- Do not copy example project logic into the scaffold unless the user explicitly requests project-specific adaptation.
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